Virtual Memory Paging Simulation

This was completed during my study of Operating Systems. I implemented virtual-to-physical memory address translation and demand paging by designing and building a page table. I had the choice of using a multi-level page table or a hashed page table for this design.

I chose to use a hashed page table because I found it to be the more fun option, given my interest in and passion for data structures and the hash table analysis I had completed in my Enriched Data Structure Analysis course.

This led to extremely fast hashing and memory address translation for the virtual memory system. Using a single hashed page table instead of a multi level one allowed me to perform O(1) time lookups and minimise space complexity.

I also implemented the Round Robin, Clock, and simplified 2Q page replacement algorithms which performed page replacement efficiently. My implementations of Round Robin and simplified 2Q achieved O(1) initialization, eviction, and reference in time and space complexity. Clock achieved O(1) in initialization and reference for time and space complexity and O(1) time complexity for eviction with O(M) for space complexity where M was the size of the memory.